TY - GEN
T1 - DeSyRe
T2 - 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications, ARC 2014
AU - Sourdis, I.
AU - Strydis, C.
AU - Armato, A.
AU - Bouganis, C. S.
AU - Falsafi, B.
AU - Gaydadjiev, G. N.
AU - Isaza, S.
AU - Malek, A.
AU - Mariani, R.
AU - Pagliarini, S.
AU - Pnevmatikatos, D. N.
AU - Pradhan, D. K.
AU - Rauwerda, G.
AU - Seepers, R. M.
AU - Shafik, R. A.
AU - Smaragdos, G.
AU - Theodoropoulos, D.
AU - Tzilis, S.
AU - Vavouras, M.
N1 - Funding Information:
The DeSyRe Project is supported by the European Commission Seventh Framework Programme, grant agreement no 287611. www.desyre.eu
PY - 2014
Y1 - 2014
N2 - The DeSyRe project builds on-demand adaptive, reliable Systems-on-Chips. In response to the current semiconductor technology trends thatmake chips becoming less reliable, DeSyRe describes a newgeneration of by design reliable systems, at a reduced power and performance cost. This is achieved through the following main contributions. DeSyRe defines a fault-tolerant system architecture built out of unreliable components, rather than aiming at totally fault-free and hence more costly chips. In addition, DeSyRe systems are on-demand adaptive to various types and densities of faults, as well as to other system constraints and application requirements. For leveraging on-demand adaptation/customization and reliability at reduced cost, a new dynamically reconfigurable substrate is designed and combined with runtime system software support. The above define a generic and repeatable design framework, which is applied to two medical SoCs with high reliability constraints and diverse performance and power requirements. One of the main goals of the DeSyRe project is to increase the availability of SoC components in the presence of permanents faults, caused at manufacturing time or due to device aging. A mix of coarse- and fine-grain reconfigurable hardware substrate is designed to isolate and bypass faulty component parts. The flexibility provided by the DeSyRe reconfigurable substrate is exploited at runtime by system optimization heuristics,which decide tomodify component configurationwhen a permanent fault is detected, providing graceful degradation.
AB - The DeSyRe project builds on-demand adaptive, reliable Systems-on-Chips. In response to the current semiconductor technology trends thatmake chips becoming less reliable, DeSyRe describes a newgeneration of by design reliable systems, at a reduced power and performance cost. This is achieved through the following main contributions. DeSyRe defines a fault-tolerant system architecture built out of unreliable components, rather than aiming at totally fault-free and hence more costly chips. In addition, DeSyRe systems are on-demand adaptive to various types and densities of faults, as well as to other system constraints and application requirements. For leveraging on-demand adaptation/customization and reliability at reduced cost, a new dynamically reconfigurable substrate is designed and combined with runtime system software support. The above define a generic and repeatable design framework, which is applied to two medical SoCs with high reliability constraints and diverse performance and power requirements. One of the main goals of the DeSyRe project is to increase the availability of SoC components in the presence of permanents faults, caused at manufacturing time or due to device aging. A mix of coarse- and fine-grain reconfigurable hardware substrate is designed to isolate and bypass faulty component parts. The flexibility provided by the DeSyRe reconfigurable substrate is exploited at runtime by system optimization heuristics,which decide tomodify component configurationwhen a permanent fault is detected, providing graceful degradation.
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U2 - 10.1007/978-3-319-05960-0_34
DO - 10.1007/978-3-319-05960-0_34
M3 - Conference contribution
AN - SCOPUS:84958538557
SN - 9783319059594
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 312
EP - 317
BT - Reconfigurable Computing
PB - Springer
Y2 - 14 April 2014 through 16 April 2014
ER -